Back-drilling Process Optimization for 100G+ Optical Module PCBs

Introduction

In high-speed optical module PCBs operating at 100 Gbps and beyond, maintaining signal integrity is paramount. Back-drilling is a widely adopted technique to remove the unused portion of via stubs that cause reflections and resonance. However, the process itself introduces mechanical and electrical challenges that must be carefully managed.

This case study examines a real-world 100G optical module design where back-drilling was applied to reduce stub-induced insertion loss. The goal is to illustrate how precise control of stub length and compensation for copper damage can preserve impedance continuity and ensure reliable performance.

Impact of Stub Length on Signal Integrity

Uncontrolled via stubs act as capacitive loads and create impedance discontinuities, leading to significant signal degradation at high frequencies. In the studied design, a 10-mil stub caused a 3 dB insertion loss spike at 25 GHz, which is unacceptable for 100G+ PAM4 signaling.

To achieve optimal results, the back-drilling depth must be controlled within ±2 mils. This was accomplished by using a computer-controlled drilling machine with real-time depth feedback and a dedicated back-up material to minimize drill bit deflection. Post-process inspection using X-ray and electrical TDR confirmed stub lengths of 3–5 mils, reducing the resonant notch to below 0.5 dB.

Moreover, the residual stub length was correlated with impedance variation: a 5-mil stub resulted in a impedance dip of 4 ohms, while a 2-mil stub yielded only 1 ohm deviation. This highlights the critical need for tight tolerance in stub management.

Challenges with Back-drilling: Copper Damage and Impedance Disruption

The mechanical drilling action inevitably damages the copper barrel near the back-drill entry point. In our case, the initial back-drilling pass created a 1-mil widening of the hole diameter and roughened the inner copper surface, increasing the DC resistance by 8% and altering the characteristic impedance by 3 ohms at that region.

To quantify the impact, we measured the impedance profile with a time-domain reflectometer (TDR) before and after back-drilling. The damaged zone exhibited a impedance spike of 5 ohms over a length of 20 mils, which caused multiple reflection points in the channel. This effect is particularly detrimental for differential pairs, where any asymmetry in copper removal leads to common-mode conversion.

Additionally, the back-drilling debris can embed into the remaining copper, creating micro-cracks or voids. SEM inspection revealed occasional micro-fractures up to 0.5 mil deep in the copper barrel, which under thermal cycling could propagate and cause open circuits.

Compensation Design Methods

To counteract the impedance disruption, we applied a two-step compensation approach. First, the back-drill diameter was selected slightly smaller than the via pad to avoid excessive copper removal, and the drill speed was optimized (20k RPM with 0.5 mil/s feed) to reduce tearing. Second, the damaged area was compensated by widening the trace entering the via to lower its inductance, effectively restoring impedance matching.

Specifically, a 4-mil trace was tapered to 6 mils over a length of 10 mils before the via, using a smooth transitioning shape. This reduced the impedance bump from 5 ohms to 1.5 ohms. Additionally, we added a small capacitive pad (2 pF) adjacent to the via to absorb some of the parasitic inductance, further flattening the impedance profile.

For the copper integrity, we specified an over-etch of 0.3 mils during the subsequent plating process to remove any micro-cracks, followed by a micro-etch step to smooth the surface. This improved the DC resistance increase to less than 2%. A final TDR and time-domain transmission (TDT) measurement showed that the compensated channel met the return loss requirement of -15 dB up to 30 GHz.

Conclusion

Back-drilling remains essential for 100G+ optical module PCBs to eliminate stub-induced resonances. However, without careful control of stub length and compensation for copper damage, the process can introduce impedance discontinuities that degrade signal quality. This case study demonstrates that by combining tight mechanical tolerances, optimized drilling parameters, and intelligent layout compensation, it is possible to achieve a robust back-drilled via with minimal performance penalty.

Future designs should also consider using advanced back-drilling techniques such as step-drilling or laser-based ablation to further reduce copper damage. Ultimately, a holistic approach that integrates fabrication process control with electrical design compensation yields the best signal integrity results for ultra-high-speed interconnects.